We conduct research in computer architecture and hardware security. Our research is focused on making computers better by improving their security with hardware enhancements and making them more energy-efficient through novel microarchitectures and program characterization techniques.
Current security measures have largely overlooked the benefits of hardware enhanced security, and are mostly oriented to top-down design where the most exposed layers of the system, the network/application layers, are first studied assuming that the lower layers are secure, even when they are not. The lower layers are studied only when new threats appear at those layers. Security has thus become reactive, and as the cliché goes, an arms race to the bottom. Instead, we are investigating a proactive, bottom-up approach to computer hardware design by considering security as a first order design constraint. Our work has two broad objectives: (1) providing hardware support for securing software, and (2) protecting the hardware itself from attacks.
Hybrid Continuous Discrete Computer Architectures
Current technology trends indicate that power- and energy-efficiency will limit chip throughput in the future. Current solutions to these problems, either in the way of digital acceleration or parallel execution are very close to reaching their limits because of fundamental transistor efficiency constraints and achievable speedup due to sequential regions. A significant departure from current computing methods is required to carry forward computing advances.
At CASTL, we are improving the energy-efficiency and programmability of a large class of problems by employing a hybrid discrete-continuous model of computation instead of the ubiquitous, traditional discrete model of computation. A fundamental source of inefficiency in computing systems today is that many real-world continuous problems are artificially mapped on to the discrete execution model. We will discuss historical reasons for this approach and how the mismatch limits achievable efficiency and complicates programming. Then, drawing inspiration from the early analog computers that provided hardware primitives for continuous operations such as mathematical integration and by leveraging some features of modern digital implementations, I will discuss how on-chip analog accelerators combined with digital cores can implement the proposed hybrid discrete-continuous model and provide execution capabilities that are superior to either implementation alone.
Methods and Tools for Program Characterization
Systems engineering relies on observation and refinement. We observe inefficiencies or usage patterns and refine our systems based on these observations. At CASTL we are developing tools to make observation easier via pattern detection, machine learning, program analysis and runtime monitoring.